Cypress - CY7C1320CV18-267BZXC

Below are all the different types of Cypress. Select the device of your choice, to download the manual

Contents

CY7C1318CV18 CY7C1320CV18 y CYPRESS PERFORM 18 Mbit DDR li SRAM 2 Word Burst Architecture Features 18 Mbit Density 1M x 18 512Kx 36 267 MHz Clock for high Bandwidth 2 word Burst for reducing Address Bus Frequency Double Data Rate DDR Interfaces data transferred at 534 MHz at 267 MHz Two Input Clocks K and K for precise DDR Timing SRAM uses rising edges only Two Input Clocks for Output Data C and C to minimize Clock Skew and Flight Time mismatches Echo Clocks CQ and CQ simplify Data Capture in High Speed Systems Synchronous internally Self timed Writes DDR II operates with 1 5 Cycle Read Latency when the DLL is enabled Operates similar to a DDR I Device with one Cycle Read Latency in DLL Of...