Cypress - CY7C1231H

Below are all the different types of Cypress. Select the device of your choice, to download the manual

Contents

CYPRESS _ CY7C1231H PERFORM 2 Mbit 128K x 18 Flow Through SRAM with NoBL Architecture Features Can support up to 133 MHz bus operations with zero wait states Data is transferred on every clock Pin compatible and functionally equivalent to ZBT devices Internally self timed output buffer control to eliminate the need to use OE Registered inputs for flow through operation Byte Write capability 128K x 18 common I O architecture 3 3V core power supply 3 3V 2 5V I O operation Fast clock to output times 6 5 ns 133 MHz device Clock Enable CEN pin to suspend operation Synchronous self timed write Asynchronous Output Enable Offered in JEDEC standard lead free 100 pin TQFP pac ...